Regular partitioning for synthesizing fixed-size systolic arrays

نویسنده

  • Alain Darte
چکیده

Extending the projection method for the synthesis of systolic arrays , we present a procedure for the design of xed-size systolic arrays using a technique called "locally sequential globally parallel" (LSGP) partitioning. Our main result, which gives a necessary and suucient condition to characterize the boxes in which cells can be merged without connict, is the key to the procedure presented here.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Regular Partitioning for Synthesizing Xed-size Systolic Arrays

Extending the projection method for the synthesis of systolic arrays , we present a procedure for the design of xed-size systolic arrays using a technique called "locally sequential globally parallel" (LSGP) partitioning. Our main result, which gives a necessary and suucient condition to characterize the boxes in which cells can be merged without connict, is the key to the procedure presented h...

متن کامل

University of Groningen Mapping systolic FIR filter banks onto fixed-size linear processor arrays

A technique for mapping systolic FIR filter banks onto fixed-size processor arrays is presented. It is based on the time-sharing properties of c-slow circuits. The technique can be further developed to a formalism and holds high potential for automatic realization. It has been applied to the mapping of systolic filter banks onto a fixed-size array of Transputers.

متن کامل

Compilation for Scalable, Paged Virtual Hardware

Reconfigurable computing devices such as field programmable gate arrays (FPGAs) have demonstrated 10x-100x gains in performance and functional density over microprocessors for a variety of applications [13], yet their commercial use is limited primarily to serving as single-task ASIC replacements, which largely ignores their programmability and severely limits their applicability. SCORE (Stream...

متن کامل

Two Cycle-Related Problems of Regular Data Flow Graphs: Complexity and Heuristics

1 Abstract1 A regular data flow graph (RDFG) is a graph with a highly regular structure that enables its description to be exponentially smaller than the description size for an ordinary graph. Such graphs arise when certain regular iterative algorithms (like matrix multiplication or convolution) are modeled using dependence graphs. These graphs can be implemented either on systolic arrays, or ...

متن کامل

Computation of Trigonometric Functions by the Systolic Implementation of the CORDIC Algorithm

Trigonometric functions are among the most useful functions in the digital signal processing applications. The design introduced in this paper computes the trigonometric functions by means of the systolic arrays. The method for computing these functions for an arbitrary angle, , is the CORDIC algorithm. A simple standard cell is used for the systolic array. Due to the fixed inputs, in some...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:
  • Integration

دوره 12  شماره 

صفحات  -

تاریخ انتشار 1991